If you want to know details about the benchamrk, you can read this Technical Report
MPSoCBench execution can be controlled by the MPSoCBench command line tool, which controls the execution of a hierarchical structure of Makefiles.
Some of these configuration parameters allows all option to make it easy to fully execute the benchmark.
./MPSoCBench -b -p=processor -n=n_cores -s=software -i=device
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -nb
./MPSoCBench -b -p=processor -n=n_cores -s=software -i=device -pw
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -pw
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -pw -nb
./MPSoCBench -b -p=processor -n=n_cores -s=software -i=device -c=queue
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -c=queue
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -c=queue -nb
./MPSoCBench -b -p=processor -n=n_cores -s=software -i=device -pw -c=queue
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -pw -c=queue
./MPSoCBench -r -p=processor -n=n_cores -s=software -i=device -pw -c=queue -nb
./MPSoCBench -b -n=n_cores -i=device -ht -c=queue -pw
./MPSocBench -r -n=n_cores -i=device -ht -c=queue -pw
./MPSoCBench -r -n=n_cores -i=device -ht -c=queue -pw -nb
./MPSoCBench -l
./MPSoCBench -d
.processor: powerpc, mips, sparc, or arm
.n_cores: 1,2,4,8,16,32, or 64
.device: router.lt, noc.lt, noc.at
.software: basicmath, dijkstra, fft, lu, sha, stringsearch, susancorners, susanedges, susansmoothing, water, water-spatial, multi-8, multi-16, multi-office-telecomm, multi-network-automotive, multi-security.
This script creates a run-directory for each differente platform and configure all Makefiles required.
The following line will build and run all programs in the 64-mips including power consumption, using a NOC-LT as interconnection device:
./MPSoCBench -r -p=mips -pw -s=all -i=noc.lt -n=64 -pw
The following line will build (without running) the dijkstra benchmark in the 16-core platforms, using all available processors and a router as interconnection device:
./MPSoCBench -b -s=dijkstra -p=all -n=16 -i=router.lt
You can also manually change the main Makefile in order to configure any simulation, instead of using the script. For example:
export PROCESSOR := arm
export SOFTWARE := water-spatial
export NUMPROCESSORS := 8
export CROSS := $(PROCESSOR)-elf-gcc
export PLATFORM := platform.noc.lt
export POWER_SIM_FLAG :=
export WAIT_TRANSPORT_FLAG := -DWAIT_TRANSPORT
export TRANSPORT := block
include Makefile.conf
include Makefile.rules
In this case, after update the Makefile, you need to compile all components:
$ make
Making IP tlm_memory ...
Making IP tlm_lock ...
Making IS tlm_router_lt ...
Making Processor arm ...
Making Software water-spatial ...
Making Platform platform.router.lt
And finally you can execute:
$ make run
SystemC 2.3.0-ASI --- Apr 20 2013 11:53:51
Copyright (c) 1996-2012 by all Contributors,
ALL RIGHTS RESERVED
ArchC: Reading ELF application file: water-spatial.arm.x
ArchC: -------------------- Starting Simulation --------------------
ArchC: -------------------- Starting Simulation --------------------
ArchC: -------------------- Starting Simulation --------------------
ArchC: -------------------- Starting Simulation --------------------
MPSoCBench: The simulator is prepared.
MPSoCBench: Beggining of time simulation measurement.
--------------------------------------------------------------------
-------------------------- MPSoCBench ----------------------------
------------------ Running: water-spatial --------------------------
--------------- The results will be available in -------------------
------------------ sw/water-spatial/output.dat ---------------------
--------------------------------------------------------------------
Using 4 procs on 1 steps of 64 mols
Other parameters:
TSTEP = 1.00e-15
NORDER = 6
NSAVE = 0
NRST = 0
NPRINT = 3
NFMC = 0
CUTOFF = 6.212752
8 boxes with 4 processors
...
Info: /OSCI/SystemC: Simulation stopped by user.
Total Time Taken (seconds): 332.844608
Simulation advance (seconds): 0.167695
MPSoCBench: Ending the time simulation measurement.
ArchC: Simulation statistics
Times: 335.25 user, 0.18 system, 332.87 real
Number of instructions executed: 335390004
Simulation speed: 1000.42 K instr/s
ArchC: Simulation statistics
Times: 335.25 user, 0.18 system, 332.87 real
Number of instructions executed: 335365133
Simulation speed: 1000.34 K instr/s
ArchC: Simulation statistics
Times: 335.25 user, 0.18 system, 332.87 real
Number of instructions executed: 335365146
Simulation speed: 1000.34 K instr/s
ArchC: Simulation statistics
Times: 335.25 user, 0.18 system, 332.87 real
Number of instructions executed: 335365116
Simulation speed: 1000.34 K instr/s
Beside this, the MPSoCBench stores some statistics in the report.txt text file, which is in the MPSoCBench root directory. These statistics
include number of memory access (read or write operations), number of access to the lock or the interconnection devices.
**************************************************************************
Platform ./platform.router.lt.x with 4 cores running water-spatial.mips.x
Total Time Taken (seconds): 332.844608
Simulation advance (seconds): 0.167695
Lock Access: 761
Router Access: 237625521
Memory Reads: 134925288
Memory Writes: 102699472
**************************************************************************
----------------------------------------------- POWER REPORT ---------------------------------------
L - Cell Name - Cell Type - Leakage Power - Internal Power - Aggregate Power
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
RT - ppc0 - Processor - 0.000000e+00 - 0.000000e+00 - 1.953719e-01
RT - ppc1 - Processor - 0.000000e+00 - 0.000000e+00 - 1.964740e-01
RT - ppc2 - Processor - 0.000000e+00 - 0.000000e+00 - 1.963016e-01
RT - ppc3 - Processor - 0.000000e+00 - 0.000000e+00 - 1.967006e-01
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Summary:
Switching power : 0.000000e+00W
Internal power : 0.000000e+00W
Leakage power : 0.000000e+00W
Aggregate power : 7.848481e-01W
----------------
TOTALS : 7.848481e-01W
----------------------------------------------------------------------------------------------------
It will be available soon...