MPSoCBench is a benchmark composed of a scalable set of MPSoCs to enable the development and evaluation of ESL tools, methodologies and components designed at University of Campinas by the ArchC team in the Computer Systems Laboratory, Institute of Computing
MPSoCs
864 distinct MPSoCs configurations automated through scripts
ISAs simulators
ARM, PowerPC, MIPS, and SPARC processors modelsInterconnection Devices
A router, a TLM 2.0 loosely timed NoC, or a TLM 2.0 approximatelly timed NoCParallel benchmarks
17 Parallel Applications from SPLASH-2, ParMiBench and MibenchSystemC
HDL that receives a strong support from many companies in the computer industryArchC
A powerful and modern open-source architecture description language (ADL)MPSoCBench Goals
The configurable and extensible infrastructure of the MPSoCBench suite allows its use in different scenarios, like: Implementation and evaluation of new tools or methodologies in MPSoC designs, development and monitoring design refinements for lower abstraction levels, analysis and optimization of new hardware components, comparisons among different techniques for power consumption measurement, and dynamic characterization of program power consumption considering different power models, and so on.
Licenses and Contact
Please read the MPSoCBench License. Several applications/libraries come with their own licenses.
The MPSoCBench is accepted for publication at the Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation-2014. So, if your use of MPSoCBench results in a publication, please use the reference above or use this bibtex file:
Liana Duenha, Henrique Almeida, Marcelo Guedes, Matheus Boy and and Rodolfo Azevedo. MPSoCBench: A Toolset for MPSoC System Level Evaluation. Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.July, 2014.
Contact: If you want to use this tool set, please join us on the MPSoCBench list